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74LVC1G175GW,125, Flip Flop D-Type Pos-Edge 1-Element 6-Pin TSSOP T/R

Semiconductor - IC > Standard Logic > Flip Flop The 74LVC1G175GW is a single positive-edge triggered D-type Flip-flop with individual data (D) input, clock input, master reset (MR) input and Q output. The master reset (MR) is an asynchronous active low input and operates independently of the clock input. Information on the data input is transferred to the Q output on the low-to-high transition of the clock pulse. The D input must be stable one set-up time prior to the low-to-high clock transition for predictable operation. The inputs can be driven from either 3.3 or 5V devices. This feature allows the use of this device in a mixed 3.3 and 5V environment. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. Schmitt trigger action at all inputs makes the circuit highly tolerant of slower input rise and fall times. • High noise immunity • CMOS low power consumption • Latch-up performance exceeds 250mA • Direct interface with TTL levels • ±24mA Output drive current

Базовый Номер / Семейство Логики	74LVC1G175
Базовый Номер Микросхемы Логики	741G175
Выходной Ток	50мА
Количество Выводов	6вывод(-ов)
Максимальная Рабочая Температура	125 C
Максимальное Напряжение Питания	5.5В
Минимальная Рабочая Температура	-40 C
Минимальное Напряжение Питания	1.65В
Семейство Логической Микросхемы	74LVC
Стиль Корпуса Микросхемы Логики	SC-88
Тип Выхода Микросхемы	Неинвертирующий
Уровень Чувствительности к Влажности (MSL)	MSL 1-Безлимитный
Частота	300МГц
Input Type	Single Ended
Logic Family	74LVC
Logic Function	D Type
Maximum Operating Supply Voltage	5.5 V
Maximum Operating Temperature	+125 °C
Maximum Propagation Delay Time @ Maximum CL	17 ns @ 50 pF
Minimum Operating Supply Voltage	1.65 V
Minimum Operating Temperature	-40 °C
Mounting Type	Surface Mount
Number of Elements per Chip	1
Output Signal Type	Single Ended
Output Type	Single Ended
Package Type	SC-88
Pin Count	6
Polarity	Non-Inverting
Propagation Delay Test Condition	50pF
Set/Reset	Master Reset
Triggering Type	Positive Edge
Width	1.35mm
Clock Frequency	200MHz
Function	Reset
Input Capacitance	2.5pF
Maximum Propagation Delay	4ns@5V, 50pF
Number of Bits per Element	1
Number of Elements	1
Quiescent Current (Iq)	40uA
Series	74LVCSeries
Sink Current	32mA
Source Current	32mA
Supply Voltage	1.65V~5.5V