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74LVT162374DGG,112, Flip Flop D-Type Bus Interface Pos-Edge 3-ST 2-Element 48-Pin TSSOP Bulk
Standard and Specialty Logic\Standard Logic\Flip Flops
| Absolute Propagation Delay Time (ns) | 6.9 |
| Automotive | No |
| Bus Hold | No |
| ECCN (US) | EAR99 |
| EU RoHS | Compliant |
| HTS | COMPONENTS |
| Input Signal Type | Single-Ended |
| Logic Family | LVT |
| Logic Function | D-Type Bus Interface |
| Maximum High Level Output Current (mA) | -12 |
| Maximum Low Level Output Current (mA) | 12 |
| Maximum Operating Supply Voltage (V) | 3.6 |
| Maximum Operating Temperature (°C) | 85 |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 3(Typ)@3.3V |
| Maximum Quiescent Current (mA) | 4(Typ) |
| Minimum Operating Supply Voltage (V) | 2.7 |
| Minimum Operating Temperature (°C) | -40 |
| Mounting | Surface Mount |
| Number of Channels per Chip | 16 |
| Number of Element Inputs | 8 |
| Number of Element Outputs | 8 |
| Number of Elements per Chip | 2 |
| Number of Output Enables per Element | 1 |
| Output Type | 3-State |
| Package Height | 1.05(Max) |
| Package Length | 12.6(Max) |
| Package Width | 6.2(Max) |
| Packaging | Bulk |
| Part Status | Obsolete |
| PCB changed | 48 |
| Pin Count | 48 |
| Polarity | Non-Inverting |
| PPAP | No |
| Process Technology | BiCMOS |
| Propagation Delay Test Condition (pF) | 50 |
| Standard Package Name | SO |
| Supplier Package | TSSOP |
| Triggering Type | Positive-Edge |
| Typical Operating Supply Voltage (V) | 3.3 |
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