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Цена по запросу
CD4030BF, XOR Gate 4-Element 2-IN CMOS 14-Pin CDIP Tube
Standard and Specialty Logic\Standard Logic\Logic Gates
| Absolute Propagation Delay Time (ns) | 280 |
| Automotive | No |
| ECCN (US) | EAR99 |
| EDA / CAD Models | CD4030BF by Ultra Librarian |
| EU RoHS | Not Compliant |
| HTS | COMPONENTS |
| Lead Shape | Through Hole |
| Logic Family | CD4000 |
| Logic Function | XOR |
| Maximum High Level Output Current (mA) | -4.2(Min) |
| Maximum Low Level Output Current (mA) | 4.2(Min) |
| Maximum Operating Supply Voltage (V) | 18 |
| Maximum Operating Temperature (°C) | 125 |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 280@5V|130@10V|100@15V |
| Maximum Quiescent Current (uA) | 5 |
| Minimum Operating Supply Voltage (V) | 3 |
| Minimum Operating Temperature (°C) | -55 |
| Mounting | Through Hole |
| Number of Element Inputs | 2-IN |
| Number of Element Outputs | 1 |
| Number of Elements per Chip | 4 |
| Number of Output Enables per Element | 0 |
| Number of Selection Inputs per Element | 0 |
| Output Type | Push-Pull |
| Package Height | 3.56(Max) |
| Package Length | 19.94(Max) |
| Package Width | 7.19(Max) |
| Packaging | Tube |
| Part Status | Active |
| PCB changed | 14 |
| Pin Count | 14 |
| PPAP | No |
| Process Technology | CMOS |
| Propagation Delay Test Condition (pF) | 50 |
| Standard Package Name | DIP |
| Supplier Package | CDIP |
| Supplier Temperature Grade | Military |
| SVHC | Yes |
| SVHC Exceeds Threshold | Yes |
| Typical Operating Supply Voltage (V) | 3.3|5|9|12|15 |
| Typical Quiescent Current (uA) | 0.02 |
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