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CD4044BF3A, Latch Transparent 3-ST 4-CH SR-Type 16-Pin CDIP Tube
Semiconductor - IC > Standard Logic > LatchesLatch Transparent 3-ST 4-CH SR-Type 16-Pin CDIP Tube
| Absolute Propagation Delay Time (ns) | 300 |
| Automotive | No |
| Bus Hold | No |
| ECCN (US) | EAR99 |
| EU RoHS | Not Compliant |
| Latch Mode | Transparent |
| Lead Shape | Through Hole |
| Logic Family | CD4000 |
| Maximum High Level Output Current (mA) | -4.2(Min) |
| Maximum Low Level Output Current (mA) | 4.2(Min) |
| Maximum Operating Supply Voltage (V) | 18 |
| Maximum Operating Temperature (°C) | 125 |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 300@5V|140@10V|100@15V |
| Maximum Quiescent Current (uA) | 20 |
| Minimum Operating Supply Voltage (V) | 3 |
| Minimum Operating Temperature (°C) | -55 |
| Mounting | Through Hole |
| Number of Channels per Chip | 4 |
| Number of Elements per Chip | 1 |
| Number of Input Enables per Element | 0 |
| Number of Inputs per Chip | 8 |
| Number of Output Enables per Element | 1 |
| Number of Outputs per Chip | 4 |
| Number of Selection Inputs per Element | 0 |
| Output Type | 3-State |
| Packaging | Tube |
| Part Status | Active |
| PCB changed | 16 |
| Pin Count | 16 |
| Polarity | Non-Inverting |
| PPAP | No |
| Process Technology | CMOS |
| Propagation Delay Test Condition (pF) | 50 |
| Set/Reset | No |
| Standard Package Name | DIP |
| Supplier Package | CDIP |
| Supplier Temperature Grade | Military |
| Type | SR-Type |
| Typical Operating Supply Voltage (V) | 3.3|5|9|12|15 |
| Typical Quiescent Current (uA) | 0.04 |
