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Цена по запросу
CD54HC08F3A, AND Gate 4-Element 2-IN CMOS 14-Pin CDIP Tube
Standard and Specialty Logic\Standard Logic\Logic Gates
| Absolute Propagation Delay Time (ns) | 135 |
| Automotive | No |
| ECCN (US) | EAR99 |
| EDA / CAD Models | CD54HC08F3A by Ultra Librarian |
| EU RoHS | Not Compliant |
| HTS | 8542.39.00.60 |
| Lead Shape | Through Hole |
| Logic Family | HC |
| Logic Function | AND |
| Maximum High Level Output Current (mA) | -5.2 |
| Maximum Low Level Output Current (mA) | 5.2 |
| Maximum Operating Supply Voltage (V) | 6 |
| Maximum Operating Temperature (°C) | 125 |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 90@2V|18@4.5V|15@6V |
| Maximum Quiescent Current (uA) | 2 |
| Minimum Operating Supply Voltage (V) | 2 |
| Minimum Operating Temperature (°C) | -55 |
| Mounting | Through Hole |
| Number of Element Inputs | 2-IN |
| Number of Element Outputs | 1 |
| Number of Elements per Chip | 4 |
| Number of Output Enables per Element | 0 |
| Number of Selection Inputs per Element | 0 |
| Output Type | Push-Pull |
| Package Height | 3.56(Max) |
| Package Length | 19.94(Max) |
| Package Width | 7.19(Max) |
| Packaging | Tube |
| Part Status | Active |
| PCB changed | 14 |
| Pin Count | 14 |
| PPAP | No |
| Process Technology | CMOS |
| Propagation Delay Test Condition (pF) | 50 |
| Standard Package Name | DIP |
| Supplier Package | CDIP |
| Supplier Temperature Grade | Military |
| SVHC | Yes |
| SVHC Exceeds Threshold | Yes |
| Typical Operating Supply Voltage (V) | 2.5|3.3|5 |
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