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Цена по запросу
SN74LV373APWR, D-Type Transparent Latch 1 Channel 8:8 IC Tri-State 20-TSSOP
Integrated Circuits (ICs)\LogicПрозрачная защелка D-типа 1 канал 8: 8 IC Tri-State 20-TSSOP
Circuit | 8:8 |
Current - Output High, Low | 16mA, 16mA |
Delay Time - Propagation | 1ns |
Independent Circuits | 1 |
Logic Type | D-Type Transparent Latch |
Mounting Type | Surface Mount |
Operating Temperature | -40°C ~ 85°C |
Output Type | Tri-State |
Package / Case | 20-TSSOP(0.173", 4.40mm Width) |
Supplier Device Package | 20-TSSOP |
Voltage - Supply | 2V ~ 5.5V |
Absolute Propagation Delay Time (ns) | 22 |
Automotive | No |
Bus Hold | No |
ECCN (US) | EAR99 |
EDA / CAD Models | SN74LV373APWR by Ultra Librarian |
EU RoHS | Compliant |
Latch Mode | Transparent |
Lead Shape | Gull-wing |
Logic Family | LV |
Maximum High Level Output Current (mA) | -16 |
Maximum Low Level Output Current (mA) | 16 |
Maximum Operating Supply Voltage (V) | 5.5 |
Maximum Operating Temperature (°C) | 125 |
Maximum Propagation Delay Time @ Maximum CL (ns) | 18@2.5V|14.9@3.3V|9.2@5V |
Maximum Quiescent Current (uA) | 20 |
Minimum Operating Supply Voltage (V) | 2 |
Minimum Operating Temperature (°C) | -40 |
Mounting | Surface Mount |
Number of Channels per Chip | 8 |
Number of Elements per Chip | 1 |
Number of Input Enables per Element | 1 |
Number of Inputs per Chip | 8 |
Number of Output Enables per Element | 1 |
Number of Outputs per Chip | 8 |
Number of Selection Inputs per Element | 0 |
Package Length | 6.6(Max) |
Package Width | 4.5(Max) |
Packaging | Tape and Reel |
Part Status | Active |
PCB changed | 20 |
Pin Count | 20 |
Polarity | Non-Inverting |
PPAP | No |
Process Technology | CMOS |
Propagation Delay Test Condition (pF) | 50 |
Set/Reset | No |
Standard Package Name | SO |
Supplier Package | TSSOP |
Tolerant I/Os (V) | 5 Inputs |
Type | D-Type |
Typical Operating Supply Voltage (V) | 2.5|3.3|5 |